The invention relates generally to a termination circuit for a differential transmission line, and deals more particularly with a programmable termination circuit for a differential transmission line.
Differential transmission lines with a termination resistor and a differential receiver are well known today. Proper termination is required at the end of the transmission line/input of the differential receiver to avoid reflections and to accurately receive the transmitted signal. This is particularly important for low voltage signals when noise levels are significant. Noise levels tend to be high in high speed data transfer and fast switching environments.
Reduced noise margins and increasingly faster switching frequencies require tighter tolerances for the termination circuitry. It is difficult to meet the tight tolerances without dynamic adjustment because of variations in manufacturing processes and operating temperatures which both affect the magnitude of passive resistors and active resistors semiconductors. The following dynamic compensation techniques are currently known. U.S. Pat. No. 6,424,200 discloses a variable termination circuit for a non differential transmission line. The termination circuit switches parallel resistance branches in or out of the termination impedance circuit such that an effective termination impedance is selected based upon a control signal. U.S. Pat. No. 5,687,330 also discloses a termination circuit for a non differential transmission line.
An object of the present invention is to provide a programmable termination resistance for a differential transmission line.
Another object of the present invention is to provide a programmable termination resistance of the foregoing type which is automatically compensated for temperature variations and manufacturing process variations from chip to chip.
The invention resides in a termination circuit for a differential transmission line. The termination circuit comprises a plurality of resistive sub circuits. Each of the resistive sub circuits comprises a PFET and an NFET in parallel. A first resistor is connected at one end to a drain of the NFET and a source of the PFET, and connected at an opposite end to one line of the differential transmission line. A second resistor is connected at one end to a source of the NFET and a drain of the PFET, and connected an opposite end to another line of the differential transmission line. Optionally, there is another resistor connected between the differential transmission line, whereby the termination resistance is based on this other resistance in parallel with one or more of the resistive sub circuits which are enabled. Means are provided to selectively enable one or more of the resistive sub circuits to yield a desired resistance to terminate the differential transmission line.